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 DISCRETE SEMICONDUCTORS
DATA SHEET
BUJ103A Silicon Diffused Power Transistor
Product specification August 1998
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
GENERAL DESCRIPTION
BUJ103A
High-voltage, high-speed planar-passivated npn power switching transistor in TO220AB envelope intended for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems, etc.
QUICK REFERENCE DATA
SYMBOL VCESM VCBO VCEO IC ICM Ptot VCEsat hFEsat tf PARAMETER Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage Fall time CONDITIONS VBE = 0 V 2 Tmb 25 C IC = 3.0 A;IB = 0.6 A IC = 3.0 A; VCE = 5 V Ic=2A,IB1=0.4A TYP. 0.25 12.5 33 MAX. 700 700 400 4 8 80 1.0 80 UNIT V V V A A W V ns
PINNING - TO220AB
PIN 1 2 3 tab base collector emitter collector DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
c b
1 23
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj PARAMETER Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature CONDITIONS VBE = 0 V MIN. -65 MAX. 700 400 700 4 8 2 4 80 150 150 UNIT V V V A A A A W C C
Tmb 25 C
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Junction to mounting base Junction to ambient in free air CONDITIONS TYP. 60 MAX. 1.56 UNIT K/W K/W
August 1998
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
STATIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified SYMBOL ICES ICES ICBO ICEO IEBO VCEOsust VCEsat VBEsat hFE hFE hFEsat PARAMETER Collector cut-off current 1 Collector cut-off current 1 Emitter cut-off current Collector-emitter sustaining voltage Collector-emitter saturation voltage Base-emitter saturation voltage DC current gain CONDITIONS VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 C VCBO = VCESMmax (700V) VCEO = VCEOMmax (400V) VEB = 7 V; IC = 0 A IB = 0 A; IC = 10 mA; L = 25 mH IC = 3.0 A; IB = 0.6 A IC = 3.0 A; IB = 0.6 A IC = 1 mA; VCE = 5 V IC = 500 mA; VCE = 5 V IC = 2.0 A; VCE = 5 V IC = 3.0 A; VCE = 5 V MIN. 400 10 12 13.5 TYP. 0.25 0.97 17 20 16 12.5
BUJ103A
MAX. 1.0 2.0 0.1 0.1 0.1 1.0 1.5 32 32 20 -
UNIT mA mA mA mA mA V V V
DYNAMIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified SYMBOL PARAMETER Switching times (resistive load) ton ts tf ts tf Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time CONDITIONS ICon = 2.5 A; IBon = -IBoff = 0.5 A; RL = 75 ohms; VBB2 = 4V; TYP. MAX. UNIT s s s s ns s ns
0.52 2.7 0.3
0.6 3.2 0.43
ICon = 2 A; IBon = 0.4 A; LB = 1 H; -VBB = 5 V ICon = 2 A; IBon = 0.4 A; LB = 1 H; -VBB = 5 V; Tj = 100 C
1.2 33
1.4 80
-
1.8 200
1 Measured with half sine-wave voltage (curve tracer).
August 1998
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ103A
+ 50v 100-200R
IC
90 %
ICon
90 %
10 %
Horizontal Oscilloscope Vertical 300R 30-60 Hz 6V 1R
IB
ts ton toff IBon 10 % tr 30ns -IBoff
tf
Fig.1. Test circuit for VCEOsust.
Fig.4. Switching times waveforms with resistive load.
IC / mA
VCC
250 200
LC
IBon
100
LB T.U.T.
-VBB
0 VCE / V min VCEOsust
Fig.2. Oscilloscope display for VCEOsust.
Fig.5. Test circuit inductive load. VCC = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH
VCC
ICon 90 % IC
RL VIM 0 tp
IB
RB T.U.T.
ts toff IBon
10 % tf t
T
-IBoff
t
Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 s; = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements.
Fig.6. Switching times waveforms with inductive load.
August 1998
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ103A
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
VBEsat/V 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
0
20
40
60
80 100 Tmb / C
120
140
0.1
1 IC/A
10
Fig.7. Normalised power dissipation. PD% = 100PD/PD 25C = f (Tmb)
Fig.10. Base-Emitter saturation voltage. Solid lines = typ values, VBEsat = f(IC); at IC/IB =4.
h FE 100 5V
0.5
VCEsat/V
0.4
10
0.3
0.2
Tj = 25 C
1V
0.1
1 0.01
0.1 IC / A
1
10
0.0 0.1 1 IC/A 10
Fig.8. Typical DC current gain. hFE = f(IC) parameter VCE
Fig.11. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IC); at IC/IB =4.
VCEsat/V 2.0
10
Zth / (K/W)
1.6 IC=1A 1.2 2A 3A 4A
1 D= 0.5 0.2 0.1 0.05 0.02 0
0.8
0.1
0.4
P D
tp
D=
tp
T t
0.0 0.01
T
0.10 IB/A 1.00 10.00
0.01 1E-06
1E-04
Fig.9. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IB); Tj=25C.
1E-02 t/s
1E+00
Fig.12. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
August 1998
4
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ103A
IC (A)
9
IC (A)
100
8
7
6
Duty Cycle = 0.01
5
Icm max
10
tp =
4
Ic max
(1)
II
20us
3
50us
1
2
100us 200us
1
0
(2)
0 100 200 300 400 500 600 700 800 900
500us DC
VCEclamp (V)
Fig.13. Reverse bias safe operating area Tj Tjmax
0.1
I
VCC
III
0.01
LC
0.001 1 10 100 1,000
VCEclamp (V)
IBon VCL LB T.U.T.
Fig.15. Forward bias safe operating area. Ths 25 C (1) (2) I II III NB: Ptot max and Ptot peak max lines. Second breakdown limits. Region of permissible DC operation. Extension for repetitive pulse operation. Extension during turn-on in single transistor converters provided that RBE 100 and tp 0.6 s. Mounted with heatsink compound and 30 5 newton force on the centre of the envelope.
-VBB
Fig.14. Test Circuit for reverse bias safe operating area. Vcl 1000V; Vcc = 150V; VBB = -5V; LB = 1H; Lc = 200H
August 1998
5
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
BUJ103A
4,5 max 10,3 max
1,3
3,7 2,8
5,9 min
15,8 max
3,0 max not tinned
3,0
13,5 min
1,3 max 1 2 3 (2x)
2,54 2,54
0,9 max (3x)
0,6 2,4
Fig.16. TO220AB; pin 2 connected to mounting base.
Notes 1. Refer to mounting instructions for TO220 envelopes. 2. Epoxy meets UL94 V0 at 1/8".
August 1998
6
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values
BUJ103A
This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
August 1998
7
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
NOTES
BUJ103A
August 1998
8
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
NOTES
BUJ103A
August 1998
9
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
NOTES
BUJ103A
August 1998
10
Rev 1.000
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
135104/240/02/pp12
Date of release: August 1998
Document order number:
9397 750 04387


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